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* Complex analog devices such as analog or mixed-signal ICs are not very amenable to analog in-circuit testing because they require power to be applied to the board. Simple diodes and single transistors can be tested by in-circuit stimulus that essentially examines the characteristics of their semiconductor junctions. The reason for using a small stimulus voltage (typically less than 0.2 V) is to prevent current flow through semiconductor junctions that may exist between nodes. This voltage will not turn on a junction. These junctions may exist in parasitic form within ICs and are not always documented. A half-splitting technique (also called a binary chop) is a fundamental algorithm of computer science. It works by successively considering half of a set of items (grounded nodes that are receiving current in this case) while removing the other half from consideration. It recursively divides sets repeatedly until only one item is left to consider. It has a complexity related to the logarithm (base 2) of the size of the original set of items. By comparison, a linear process has a complexity linearly related to the size of the original set. This component may not be alone in a physical sense, but because low stimulus voltages are used, other connected devices such as ICs may be electrically quiescent so that the component is electrically alone.

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In general, every application breaks the tasks to be accomplished into a number of fairly straightforward blocks that are simple to create, and it assigns them to individual cogs. Of course, calculations will also have to be made, and pins will have to be set up to perform the necessary I/O. However, we will not discuss these tasks here. They are all covered in Part III of the book, where these ideas are turned into actual working applications. The coverage may not be exactly as listed in this chapter, but the general ideas are preserved.

The final step is to define the display name for each train stop as it will appear in the train navigation component. You might expect to set a property on the view activity for this, but at the

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The speed of signal propagation is inversely proportional to the square root of the dielectric constant of the substrate materials, requiring designers to be aware of the dielectric properties of the substrate materials they intend to use. The signal propagation on the substrate between chips, the so-called time of flight, is directly proportional to the length of the conductors and must be kept short to ensure the optimal electrical performance of a system operating at high speeds. For systems operating at speeds above 25 MHz, the interconnections must have transmission line characteristics to minimize signal losses and distortion. Proper design of such transmission lines requires careful calculation of the conductor and dielectric separation dimensions and their precise manufacture to ensure the expected accuracy of performance. For PWBs, there are two basic transmission line types: 1. Stripline 2. Microstrip (for details, see Chap. 15)

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Power Consumption As the clock rates of the chips increase and as the number of gates per chip grows, there is a corresponding increase in their power consumption. Some chips require up to 30 W of power for their operation. With that, more and more terminals are required to bring power in and to accommodate the return flow on the ground planes. About 20 to 30 percent of chip terminals are used for power and ground connections. With the need for electrical isolation of signals in high-speed systems operation, the count may go to 50 percent. Design engineers must provide adequate power and ground distribution planes within the multilayer boards (MLBs) to ensure efficient, low-resistance flow of currents, which may be substantial in boards interconnecting high-speed chips consuming tens of watts and operating at 5 V, 3.3 V, or lower. Proper power and ground distribution in the system is essential for reducing di /dt switching interference in high-speed systems, as well as for reducing undesirable heat concentrations. In some cases, separate bus-bar structures have been required to meet such high power demands.

Thermal Management All the energy that has been delivered to power integrated circuits (ICs) must be efficiently removed from the system to ensure its proper operation and long life. The removal of the heat from a system is one of the most difficult tasks of electronic packaging. In large systems, huge heat-sink structures, dwarfing the individual ICs, are required to air-cool them, and some computer companies have built giant superstructures for liquid cooling of their computer modules. Some computer designs use liquid immersion cooling. Still, the cooling needs of large systems tax the capabilities of existing cooling methods. The situation is not that severe in smaller, tabletop or portable electronic equipment, but it still requires packaging engineers to ameliorate the hot spots and ensure longevity of operation. Since PWBs are notoriously poor heat conductors, designers must carefully evaluate the method of heat conduction through the board, using such techniques as heat vias, embedded metal slugs, and conductive planes.

Electronic Interference As the frequency of operation of electronic equipment increases, many ICs, modules, or assemblies can act as generators of radio frequency (RF) signals. Such electromagnetic interference (EMI) emanations can seriously jeopardize the operation of neighboring electronics

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